The Factory Floor Returns: Can the CHIPS Act Reverse Three Decades of Offshoring?

For thirty years, America’s semiconductor strategy was elegantly simple: design the chips in Silicon Valley, manufacture them in Taiwan and South Korea. The fabless model worked brilliantly. Specialization lowered costs, Taiwan Semiconductor Manufacturing Company became the world’s most advanced foundry, and US companies dominated the profitable design layer while avoiding the capital-intensive fabrication business.

Then the model’s vulnerabilities became impossible to ignore. The COVID-19 pandemic exposed supply chain brittleness when automotive and electronics production stalled across multiple regions due to chip shortages. Geopolitical tensions around Taiwan raised the prospect of losing access to the factories producing roughly 90% of the world’s leading-edge logic semiconductors. Defense systems relying on chips made offshore became a national security problem impossible to ignore.

In August 2022, the US responded with the CHIPS and Science Act: USD 52.7 billion in federal semiconductor funding plus a 25% investment tax credit, aiming to rebuild a factory floor it had allowed to erode over three decades. By early 2026, with major new fabs under construction across Arizona, Texas, New York, and Ohio, the question is no longer whether America will expand domestic chip manufacturing, but whether it can build the complete ecosystem needed to turn silicon into deployed systems.

Manufacturing, Research, and Security: The Three-Track Approach

The CHIPS and Science Act isn’t structured around formal pillars like Europe’s regulatory framework, but the funding breaks into three functional clusters:

Billions for Fabs: The Manufacturing Push

USD 39 billion flows through the CHIPS for America Fund at the Department of Commerce for fabrication, assembly, test, and advanced packaging facilities. This includes about USD 2 billion earmarked for legacy chips used in automotive and defense systems. Grants typically cover up to a third of project costs and stack with aggressive state-level incentives. The 25% federal investment tax credit applies to projects beginning construction before the end of 2026.

By late 2025, announced private semiconductor investments in the US since CHIPS passed exceed USD 100 billion, much of it positioned to leverage CHIPS incentives. The landmark projects: Intel received preliminary commitment for up to USD 8.5 billion in direct funding plus loans to expand fabs in Arizona and New Mexico and build new leading-edge facilities in Ohio. TSMC Arizona was awarded around USD 6.6 billion in grants plus loan access, supporting multiple fabs with roadmaps to 3nm and later 2nm production on US soil. Micron and Samsung secured very large federal and state packages for memory and logic fabs in New York and Texas, described as a once-in-a-generation buildout.

Where Europe focuses on mature nodes and automotive power electronics,  the US focuses on leading-edge logic (sub-10nm), advanced packaging, and chips for AI and defense applications.

Research Infrastructure and the Lab-to-Product Gap

Around USD 13 billion supports semiconductor R&D and workforce development. This includes new and existing Manufacturing USA institutes focused on semiconductors, NIST research programs and metrology labs, and NSF authorizations that envision a significant increase, potentially up to a doubling, of NSF’s budget over FY 2023 to 2027 if fully appropriated. The Act also pushes the creation of regional technology and innovation hubs across the US, some specializing in semiconductors and advanced manufacturing.

This leaves the most failure-prone layer underfunded: the engineering that bridges lab prototypes and production systems. A breakthrough in chip architecture still requires embedded software development, real-time operating system optimization, firmware managing power states and thermal controls, and middleware integrating silicon with sensors, actuators, and communication protocols. These system-level capabilities determine whether a chip design becomes a deployed product or a research curiosity.

Securing Supply Chains Without a Formal Crisis Mechanism

Rather than Europe’s formal early-warning mechanism, the US approach embeds security through funding allocations and policy coupling. Around USD 2 billion of the manufacturing funding targets legacy chips used in cars and defense systems. Approximately USD 500 million over multiple years supports international ICT security and supply chain cooperation to reduce exposure to Chinese chokepoints and coordinate with allies. Export controls and outbound investment restrictions aren’t formalized inside CHIPS itself but operate in tight coordination, together functioning as the security dimension of the policy.

Execution at Scale: Where Theory Meets Friction

Dozens of major fab, packaging, and equipment projects have been announced or expanded since CHIPS passed. Commerce and NIST report that more than USD 30 billion in CHIPS for America funding had been announced by late 2025 across multiple projects and programs. The US share of global leading-edge manufacturing capacity is expected to increase in the second half of the decade as these fabs ramp, though the pace depends heavily on execution.

Although progress on paper does not guarantee execution at scale. Current friction points:

• Implementation Speed: Persistent complaints from industry that CHIPS grants took too long to move from law to actual disbursements, creating planning uncertainty. Companies need funding commitments locked before breaking ground on multi-billion-dollar facilities.
• Labor and Skills: An analysis by the Semiconductor Industry Association and Oxford Economics estimates that of roughly 115,000 new US semiconductor jobs needed by 2030, about 67,000 could go unfilled on current trends, with 61% being engineers and computer scientists and 39% technicians. TSMC’s Arizona project publicly highlighted shortages of experienced semiconductor construction and fab technicians, plus work practice gaps between Taiwanese and US staff, leading to construction delays. The talent gap extends beyond manufacturing: companies struggle to find embedded systems engineers capable of writing safety-critical firmware for automotive applications, edge AI developers who can optimize inference algorithms for specific silicon architectures, and system-level software engineers who understand both hardware constraints and real-time operating system requirements.
• Cost Structure: US fab construction and operating costs remain significantly higher than in East Asia. CHIPS incentives and tax credits offset some of this gap, but not all of it. Labor, energy, and materials cost more. Companies are betting that proximity to customers, supply chain security, and federal support justify the premium.
• Infrastructure Concentration: Very large bets are concentrated in Arizona, Texas, New York, and Ohio, raising questions about local infrastructure capacity for water, power, housing, and specialized construction labor. States are competing aggressively with their own incentive packages, but physical constraints don’t respond to subsidies alone.

Beyond Fabs: The Ecosystem Gap

CHIPS concentrates subsidies on a few large incumbents and leading-edge nodes while under-supporting legacy fabs, advanced packaging, and the broader ecosystem of design houses and equipment suppliers. Long-term funding beyond the initial USD 52.7 billion remains uncertain, and workforce pipelines through community colleges and immigration lag far behind fab construction timelines.

The integration challenge is more acute. A large share of CHIPS money flows into fabs and research labs. However, turning wafers into functioning products requires capabilities the Act barely addresses.

An automotive microcontroller fabricated in Arizona still needs safety-critical firmware meeting ISO 26262 standards, middleware connecting to CAN and FlexRay networks, and embedded software managing sensor fusion from cameras, radar, and lidar.

Medical device chips require firmware meeting FDA and IEC 62304 standards.

Industrial control systems need edge AI algorithms optimized for specific silicon architectures, plus system-level software handling predictive maintenance and over-the-air updates.

The US holds a low single-digit share of the global advanced packaging market. Most high-end packaging (chiplet integration, 2.5D and 3D stacking, hybrid bonding) remains offshore. For system developers, packaging defines bandwidth, latency, power, and firmware constraints. If backend operations stay in Asia, dependency persists even with US-made wafers.

Tens of thousands of engineering roles are forecast to go unfilled by 2030. Fab process engineers get most attention, but the deeper constraint is system-level talent, which ultimately determines whether announced capacity converts into shipped products: firmware engineers who understand power management at the register level, embedded systems architects who can partition functionality between hardware accelerators and software, and edge AI specialists who deploy neural networks on resource-constrained processors. Without sustained pipelines of this talent, announced fab capacity risks becoming stranded infrastructure that cannot integrate into products efficiently.

Strategic Positioning for the New Manufacturing Map

The CHIPS Act is a bid to reassert US leadership in advanced semiconductor manufacturing after decades of offshoring. For procurement and R&D teams, the implications are immediate.

New fab capacity in Arizona, Texas, New York, and Ohio will reduce exposure to Pacific shipping routes and Taiwan-related risk. Companies using leading-edge logic, advanced memory, or specialized automotive chips should align their supply strategies to this footprint as lead times, qualification cycles, and order volumes shift.

Access to US-made silicon, however, is only the starting point. A chip from an Arizona fab still requires board design, embedded software, middleware, and edge AI integration to become a working system.

Without parallel investment in embedded systems expertise, new fabs risk becoming stranded capacity. That expertise must be built either in-house, at higher cost and under increasing competition for talent, or secured through nearshore partners operating within aligned legal, security, and compliance frameworks.

Offshoring firmware and system integration pushes critical engineering decisions outside the jurisdictional and operational perimeter CHIPS is meant to establish. Nearshore teams preserve tighter hardware–software feedback loops, enforceable IP and export controls, and faster coordination during silicon bring-up and certification.

Early alignment with new US fabs and system-level integration capabilities is already creating separation. As production ramps, late entrants will face tighter capacity, longer qualification cycles, and reduced leverage.